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| hexfet ? power mosfet v dss = 55v r ds(on) = 4.9m i d = 120a hexfet ? is a registered trademark of international rectifier. descriptionthis hexfet ? power mosfet utilizes the latest processing techniques to achieve extremely lowon-resistance per silicon area. additional features of this design are a 175c junction operating temperature, fast switching speed and improved repetitive avalanche rating.these features combine to make this design an extremely efficient and reliable device for use in a wide variety of applications. s d g features advanced process technology ultra low on-resistance 175c operating temperature fast switching repetitive avalanche allowed up to tjmax lead-free ! "# $% & '# ( # ) *(+ ,- form quantity irf1405zs-7ppbf tube 50 irf1405zs-7ppbf eol notice # 289 irf1405zs-7ppbf tape and reel left 800 irf1405zstrl7pp IRF1405ZL-7PPBF to-263ca tube 50 IRF1405ZL-7PPBF eol notice # 288 note base part number package type standard pack d 2 pak-7pin orderable part number absolute maximum ratings parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (see fig. 9) i d @ t c = 25c continuous drain current, v gs @ 10v (package l imited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v e as single pulse avalanche energy (thermally limited) mj e as (tested) single pulse avalanche energy tested value i ar avalanche current a e ar repetitive avalanche energy mj t j operating junction and t st g storage temperature range soldering temperature, for 10 seconds thermal resistance parameter typ. max. units r jc junction-to-case CCC 0.65 r ja junction-to-ambient (pcb mount, steady state) CCC 40 300(1.6mm from case) c a c/w 230 1.5 20 250 810 see fig.12a,12b,15,16 -55 to + 175 max. 150 100 590 120 downloaded from: http:/// ! "# $% & '# ( # ) s d g s d g static @ t j = 25c (unless otherwise specified) parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 55 CCC CCC v ? v dss / t j breakdown voltage temp. coefficient CCC 0.054 CCC v/c r ds(on) smd static drain-to-source on-resistance CCC 3.7 4.9 m v gs(t h) gate threshold voltage 2.0 CCC 4.0 v gfs forward transconductance 150 CCC CCC s i dss drain-to-source leakage current CCC CCC 20 CCC CCC 250 i gss gate-to-source forward leakage CCC CCC 200 gate-to-source reverse leakage CCC CCC -200 q g total gate charge CCC 150 230 q gs gate-to-source charge CCC 37 CCC q gd gate-to-drain ("miller") charge CCC 64 CCC t d(on) turn-on delay time CCC 16 CCC t r rise time CCC 140 CCC t d(off) turn-off delay time CCC 170 CCC t f fall time CCC 130 CCC l d internal drain inductance CCC 4.5 CCC nh between lead, 6mm (0.25in.) l s internal source inductance CCC 7.5 CCC from package and center of die contact c iss input capacitance CCC 5360 CCC c os s output capacitance CCC 1310 CCC c rss reverse transfer capacitance CCC 340 CCC c os s output capacitance CCC 6080 CCC c os s output capacitance CCC 920 CCC c os s eff. effective output capacitance CCC 1700 CCC diode characteristics parameter min. typ. max. units i s continuous source current (body diode) a i sm pulsed source current (body diode) v sd diode forward voltage CCC CCC 1.3 v t rr reverse recovery time CCC 63 95 ns q rr reverse recovery charge CCC 160 240 nc pf nanc a ns CCC CCC 150 CCC CCC 590 v ds = v gs , i d = 150 a v ds = 55v, v gs = 0v v ds = 55v, v gs = 0v, t j = 125c conditions v gs = 0v, i d = 250 a reference to 25c, i d = 1ma v gs = 10v, i d = 88a t j = 25c, i f = 88a, v dd = 28v di/dt = 100a/ s t j = 25c, i s = 88a, v gs = 0v showing the integral reverse p-n junction diode. v gs = 0v, v ds = 1.0v, ? = 1.0mhz v gs = 10v mosfet symbol v gs = 0v v ds = 25v v gs = 0v, v ds = 44v, ? = 1.0mhz conditions v gs = 0v, v ds = 0v to 44v ? = 1.0mhz, see fig. 5 r g = 5.0 i d = 88a v ds = 25v, i d = 88a v dd = 28v i d = 88a v gs = 20v v gs = -20v v ds = 44v v gs = 10v repetitive rating; pulse width limited by max. junction temperature. (see fig. 11). limited by t jmax , starting t j = 25c, l=0.064mh, r g = 25 , i as = 88a, v gs =10v. part not recommended for use above this value. pulse width 1.0ms; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. this value determined from sample failure population. 100% tested to this value in production. this is applied to d 2 pak, when mounted on 1" square pcb ( fr-4 or g-10 material ). for recommended footprint and soldering techniques refer to application note #an-994. r is measured at t j of approximately 90c. solder mounted on ims substrate. downloaded from: http:/// ! "# $% & '# ( # ) fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. typical forward transconductance vs. drain current 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 60 s pulse width tj = 25c 4.5v 0 2 4 6 8 10 12 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 175c v ds = 25v 60 s pulse width 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 60 s pulse width tj = 175c vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 0 25 50 75 100 125 150 175 200 i d ,drain-to-source current (a) 0 25 50 75 100 125 150 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 10v 300 s pulse width downloaded from: http:/// ! "# $% & '# ( # ) fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 50 100 150 200 q g total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 44v v ds = 28v i d = 88a 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0.0 0.5 1.0 1.5 2.0 2.5 v sd , source-to-drain voltage (v) 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 1 10 100 1000 v ds , drain-to-source voltage (v) 0.01 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 175c single pulse 100 sec 1msec 10msec dc downloaded from: http:/// ! "# $% & '# ( # ) fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10. normalized on-resistance vs. temperature -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 88a v gs = 10v 1e-006 1e-005 0.0001 0.001 0.01 0.1 1 t 1 , rectangular pulse duration (sec) 0.0001 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 0.1707 0.0002350.1923 0.000791 0.2885 0.008193 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 c ci i / ri ci= i / ri 25 50 75 100 125 150 175 t c , case temperature (c) 0 25 50 75 100 125 150 i d , d r a i n c u r r e n t ( a ) downloaded from: http:/// ! "# $% & '# ( # ) q g q gs q gd v g charge d.u.t. v ds i d i g 3ma v gs .3 f 50k .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 t p d.u.t l v ds + - v dd driver a 15v 20v v gs 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 200 400 600 800 1000 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 14a 23a bottom 88a -75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 150 a i d = 250 a i d = 1.0ma i d = 1.0a downloaded from: http:/// ! "# $% & '# ( # ) fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type.2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse.5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 50 100 150 200 250 300 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 88a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming tj = 150c and tstart =25c (single pulse) downloaded from: http:/// . ! "# $% & '# ( # ) fig 17. for n-channel hexfet power mosfets ? ? ? p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-appliedvoltage reverserecovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period / 0 /121 3 3 $ + - + + + - - - ! / ? ! ? " #$## ? % & & ? #$## ' $ v ds 90%10% v gs t d(on) t r t d(off) t f / () 1 * % 0.1 % ! / ! 4* / + - / fig 18a. switching time test circuit fig 18b. switching time waveforms downloaded from: http:/// ) ! "# $% & '# ( # ) d 2 pak - 7 pin package outline dimensions are shown in millimeters (inches) http://www.irf.com/package/ d 2 pak - 7 pin part marking information http://www.irf.com/package/ downloaded from: http:/// ! "# $% & '# ( # ) to-263ca 7 pin long leads package outlinedimensions are shown in millimeters (inches) http://www.irf.com/package/ downloaded from: http:/// ! "# $% & '# ( # ) d 2 pak - 7 pin tape and reel http://www.irf.com/package/ downloaded from: http:/// ! "# $% & '# ( # ) !" # http://www.irf.com/product-info/reliability $%% &' ' ( ) % * +*,% - *.' ,/ . 012 3.4,$ .% (%#"""* * )"( 5 ms l 1 to- 263ca 7pi n rohs c ompliant (per jedec j-std-020d ?? ) yes qualification information ? qualification level industrial ?? (per jedec jesd47f ??? guidelines) d 2 pak-7pin moisture sensitivity level date comments ? updated data sheet with ir corporate template. ? updated d2-pak 7-pin ordering information to reflect the end-of-life of the tube pack aging option (eol notice #289) ? removed to-263ca package (eol notice # 288). ? removed r ja = 62 c/w & r = 0.5 c/w from thermal resistance table on page 1( does not apply to d2-pak 7- pin). ? updated part marking on page 9 . revision history 10/29/2014 downloaded from: http:/// |
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